Phase Change Memory Using Nanowires

The quest to create fast, non-volatile phase-change memory dates to Stanford Ovshinky's 1966 patent application. Since then, many companies such as Intel, have made significant progress toward developing such a potentially revolutionary memory technology. The latest advance comes from a UPenn team that used nanowires to fabricate a phase change memory.

Ritesh Agarwal, an assistant professor in the Department of Materials Science and Engineering, and colleagues developed a self-assembling nanowire of germanium antimony telluride, a phase-changing material that switches between amorphous and crystalline structures, the key to read/write computer memory. Fabrication of the nanoscale devices, roughly 100 atoms in diameter, was performed without conventional lithography, the blunt, top-down manufacturing process that employs strong chemicals and often produces unusable materials with space, size and efficiency limitations.

Instead, researchers used self-assembly, a process by which chemical reactants crystallize at lower temperatures mediated by nanoscale metal catalysts to spontaneously form nanowires that were 30-50 nanometers in diameter and 10 micrometers in length, and then they fabricated memory devices on silicon substrates.

“We measured the resulting nanowires for write-current amplitude, switching speed between amorphous and crystalline phases, long-term durability and data retention time,” Agarwal said.

Tests showed extremely low power consumption for data encoding (0.7mW per bit). They also indicated the data writing, erasing and retrieval (50 nanoseconds) to be 1,000 times faster than conventional Flash memory and indicated the device would not lose data even after approximately 100,000 years of use, all with the potential to realize terabit-level nonvolatile memory device density.

“This new form of memory has the potential to revolutionize the way we share information, transfer data and even download entertainment as consumers,” Agarwal said. “This represents a potential sea-change in the way we access and store data.”

Eurekalert

The history of computer memory research is littered with failed concepts that offered great promise, but could not deliver for technical or economic reasons. Phase change memory technology is a relatively simple concept and should not be expensive, once developed. It will be much faster and more radiation resistant than flash memory, and will last much longer. Memory density should also be better than flash, and since it is non-volatile, it may become a replacement for hard disk drives. If it can be made fast enough, it may also replace volatile RAM memory.

In other words, regardless of whether phase change memory is implemented from the top down (lithography) or the bottom up (nano-wires), the underlying technology is likely to come standard, at least in top of the line machines, in the near future.

Hat tip Brian Wang.

Farewell to Von Neumann, With Gratitude

The familiar Von Neumann architecture processor above is what most of us have grown up with. It is reliable and capable of impressive speeds, if you can control the heat output, and do not demand too awfully much performance.

Below is a graphic of a 64 core chip (Tile64) from Tilera. Tilera claims to have overcome the limitations of multi-core chips with a novel on-chip network, called the iMesh.Perhaps you already have a dual-core or quad-core processor. Such multi-core chips provide improved performance via superscalar execution, pipelining, and multi-threading.

But a 64-core chip (manycore processing) with dramatically improved core-core communication, would introduce remarkable advances in computing speed and capability.

Tilera said it holds 40-plus patents pending and claimed to have signed up a dozen customers who are deploying the Tile64 processor in networking and digital multimedia products.

The scalability of the Tile architecture depends on the iMesh interconnect system which appears to be a conventional Manhattan-style grid architecture, although Tilera claimed it includes a number of patented innovations that enhance the performance and flexibility of the mesh. One such is the ability to create grids as large or as small as an application requires as a means to tailor power consumption. Each of the 64 cores on the Tile64 processor is capable of running its own operating system, such as Linux, and includes L1 and L2 caches, as well as an innovative distributed L3 cache. The cores are overlaid with the iMesh network, providing for silicon area efficiency. The processor integrates four DDR2 memory controllers and a complete array of high speed I/O interfaces, including two 10 Gbps XAUI, two 10 Gbps PCIe, two 1 Gbps Ethernet RGMII, and a programmable flexible I/O interface to support interfaces such as compact flash and disk drives.

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With 1000 core processor chips on the horizon, it is clear that the future of massively parallel computing will be a bit different than what Danny Hillis originally envisioned. That is the nature of technology. It leapfrogs itself with such rapidity that one must get used to being stunned by future shock.

Many core computing is massive parallelism on a chip. Supercomputing has just been compressed to impressively compact dimensions. Machine intelligence was never going to work with Von Neumann architecture. But with massively parallel computing chips, the light at the end of the tunnel may be starting to shimmer.

The Nano Domain

Korean researchers aim to break the 10 nanometer barrier for circuit design, using carbon nanotubes to etch the circuits.

Leading the project are Prof. Choi Hee-cheul of Pohang University of Science and Technology and Kim Hyun-tak of the Electronics and Telecommunications Research Institute (ETRI).

Choi employed carbon nanotubes to successfully etch circuits that are thinner than 10 nanometers on the face of silicon wafers. One nanometer is equal to one billionth of a meter.

``As far as we know, we broke a 10-nanometer barrier for the first time in history. We could make the breakthrough after finding unique surface chemical reactions of carbon nanotubes,'' Choi said.

``We hope this carbon nanotube-based technology will help crank out 10-nanometer memory chips. Toward that end, we are currently cooperating with U.S. venture start-ups,'' he said.

The findings were featured in Nature Nanotechnology this week.

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Researchers at the University of Massachusetts School of Medicine are designing nanoscale protein traps for catching and disabling deadly viruses in the body--such as HIV.

The next stage of their research would be to mix engineered red blood cells and normal immune cells in a dish and see whether they can trap HIV. Dr. Turner speculated that someday it might be possible to give HIV patients transfusions of engineered blood cells. The cells would lure the virus away from T cells, allowing a patient’s immune system to recover. And since red blood cells survive only a few months before being destroyed in the spleen, the trapped viruses would gradually disappear from the patient’s body.

....even if the virus was not completely destroyed in a patient, driving down the numbers would have significant benefits. It would keep the immune system from collapsing, which is what AIDS drugs are designed to do now. But traps might end up being cheaper.

Dr. Finberg is also exploring other ways to trap viruses. “We did it with red blood cells, but they didn’t have to be red blood cells,” he said. “Another way to do it would be to pull them out with beads.”

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Scientists at the Universities of Heidelberg and Bayreuth in Germany, are designing 14 nanometer sized grains of boron-nitride that are 85% as hard as diamond. These nanograins, when mass-produced, should provide an economical material for industrial cutting, drilling, grinding, and other applications. When molecular assembly comes into its own, this material may provide a useful substitute for diamondoid nano-assemblies for some uses.

Drexlerian molecular assemblers are probably decades away. Nanotechnology engineers and scientists have still not learned enough from biological molecular assembly, to understand enough of the potentials and limitations of molecular fabrication. Between where we are, and the time of abundant Drexlerian nano-assemblers, will be a time of exciting discovery. We do need to grow out of our narcissism, psychological neoteny, superstitious natures, and hyper-emotionalism, before we will be ready for the granting of our every wish.

Fast, Flexible Computer Chips and Optical Chipsets

MONARCH is a new "supercomputer on a chip" capable of 64 Gigaflops with memory bandwidth of 60 Gbps and off-chip data bandwidth of 43 Gbps.

Granacki is director of the Advanced Systems Division at ISI, and Research Associate Professor of Electrical Engineering Systems and Biomedical Engineering in the USC Viterbi School of Engineering.

"What we have been creating is essentially a supercomputer on a chip," he said, "and not just a supercomputer, but a flexible supercomputer that reconfigures itself into the optimal supercomputer for each specific part of a multi-part task."

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Meanwhile IBM has created the world's fastist optical chipset.

Measuring 3.25 by 5.25 millimeters, IBM's new optical chipset contains both driver and receiver circuits, and was built using industry-standard complementary metal oxide semiconductor (CMOS) technology. Optical-grade plastic fibers are used to transmit data, and optical components use indium phosphide (InP) and gallium arsenide (GaAs).

Because of the large number of communication channels as well as the very high speeds for each channel, IBM said the chipset provides the highest record ever of transmitted information per unit of physical space.

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These very powerful chips will soon be available in large quantities, which makes one wonder how they will be used. The IBM optical chip has enough data throughput to run a medium sized war--ground, sea, air, and space (data equivalent to four million simultaneous telephone conversations). All on a chip roughly the size of a dime.

The MONARCH supercomputer-on-a-chip has the ability to reconfigure itself to adapt to different computing tasks on the fly.

If you consider these powerful chips to be mere building blocks of a more powerful system, or networks of systems, you may begin to see the potential for systems designers.

Most people will probably just want better video gaming and more realistic virtual reality effects. Computer hobbyists will want to build extremely fast custom systems to impress their friends. Financial and security interests will want more advanced systems to provide better data security. Domestic and international criminals and terrorists will likewise want the features of these advanced chips.

With the rate of advancement in chip processing power and data bandwidth, it becomes more difficult for the holders of wealth and power to keep the wolves at bay. I recommend diversifying.
;-)