20 August 2007

Farewell to Von Neumann, With Gratitude

The familiar Von Neumann architecture processor above is what most of us have grown up with. It is reliable and capable of impressive speeds, if you can control the heat output, and do not demand too awfully much performance.

Below is a graphic of a 64 core chip (Tile64) from Tilera. Tilera claims to have overcome the limitations of multi-core chips with a novel on-chip network, called the iMesh.Perhaps you already have a dual-core or quad-core processor. Such multi-core chips provide improved performance via superscalar execution, pipelining, and multi-threading.

But a 64-core chip (manycore processing) with dramatically improved core-core communication, would introduce remarkable advances in computing speed and capability.
Tilera said it holds 40-plus patents pending and claimed to have signed up a dozen customers who are deploying the Tile64 processor in networking and digital multimedia products.

The scalability of the Tile architecture depends on the iMesh interconnect system which appears to be a conventional Manhattan-style grid architecture, although Tilera claimed it includes a number of patented innovations that enhance the performance and flexibility of the mesh. One such is the ability to create grids as large or as small as an application requires as a means to tailor power consumption. Each of the 64 cores on the Tile64 processor is capable of running its own operating system, such as Linux, and includes L1 and L2 caches, as well as an innovative distributed L3 cache. The cores are overlaid with the iMesh network, providing for silicon area efficiency. The processor integrates four DDR2 memory controllers and a complete array of high speed I/O interfaces, including two 10 Gbps XAUI, two 10 Gbps PCIe, two 1 Gbps Ethernet RGMII, and a programmable flexible I/O interface to support interfaces such as compact flash and disk drives.

With 1000 core processor chips on the horizon, it is clear that the future of massively parallel computing will be a bit different than what Danny Hillis originally envisioned. That is the nature of technology. It leapfrogs itself with such rapidity that one must get used to being stunned by future shock.

Many core computing is massive parallelism on a chip. Supercomputing has just been compressed to impressively compact dimensions. Machine intelligence was never going to work with Von Neumann architecture. But with massively parallel computing chips, the light at the end of the tunnel may be starting to shimmer.

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